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<a href="wb32l003__syscon_8h.html">浏览该文件的文档.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;</div><div class="line"><a name="l00010"></a><span class="lineno">   10</span>&#160;<span class="comment">/* Define to prevent recursive inclusion -------------------------------------*/</span></div><div class="line"><a name="l00011"></a><span class="lineno">   11</span>&#160;<span class="preprocessor">#ifndef __WB32L003_SYSCON_H</span></div><div class="line"><a name="l00012"></a><span class="lineno">   12</span>&#160;<span class="preprocessor">#define __WB32L003_SYSCON_H</span></div><div class="line"><a name="l00013"></a><span class="lineno">   13</span>&#160;</div><div class="line"><a name="l00014"></a><span class="lineno">   14</span>&#160;<span class="preprocessor">#ifdef __cplusplus</span></div><div class="line"><a name="l00015"></a><span class="lineno">   15</span>&#160; <span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div><div class="line"><a name="l00016"></a><span class="lineno">   16</span>&#160;<span class="preprocessor">#endif</span></div><div class="line"><a name="l00017"></a><span class="lineno">   17</span>&#160;</div><div class="line"><a name="l00018"></a><span class="lineno">   18</span>&#160;<span class="comment">/* Includes ------------------------------------------------------------------*/</span></div><div class="line"><a name="l00019"></a><span class="lineno">   19</span>&#160;<span class="preprocessor">#include &quot;wb32l003.h&quot;</span></div><div class="line"><a name="l00020"></a><span class="lineno">   20</span>&#160;</div><div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;<span class="comment">/* Exported types ------------------------------------------------------------*/</span></div><div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;<span class="comment">/* Exported constants --------------------------------------------------------*/</span></div><div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;</div><div class="line"><a name="l00037"></a><span class="lineno">   37</span>&#160;<span class="preprocessor">#define SYSCON_KEY_UNLOCK        (0x5A69)</span></div><div class="line"><a name="l00038"></a><span class="lineno">   38</span>&#160;</div><div class="line"><a name="l00039"></a><span class="lineno">   39</span>&#160;<span class="preprocessor">#define SYSCON_DEFAULT           (0x00U)</span></div><div class="line"><a name="l00040"></a><span class="lineno">   40</span>&#160;<span class="preprocessor">#define SYSCON_UART1_RXD         (0x01U)</span></div><div class="line"><a name="l00041"></a><span class="lineno">   41</span>&#160;<span class="preprocessor">#define SYSCON_UART2_RXD         (0x02U)</span></div><div class="line"><a name="l00042"></a><span class="lineno">   42</span>&#160;<span class="preprocessor">#define SYSCON_LPUART_RXD        (0x03U)</span></div><div class="line"><a name="l00043"></a><span class="lineno">   43</span>&#160;<span class="preprocessor">#define SYSCON_LIRC              (0x04U)</span></div><div class="line"><a name="l00044"></a><span class="lineno">   44</span>&#160;</div><div class="line"><a name="l00045"></a><span class="lineno">   45</span>&#160;<span class="preprocessor">#define SYSCON_SPINCS_SEL_0      (0x01 &lt;&lt; 0)</span></div><div class="line"><a name="l00046"></a><span class="lineno">   46</span>&#160;<span class="preprocessor">#define SYSCON_SPINCS_SEL_1      (0x01 &lt;&lt; 1)</span></div><div class="line"><a name="l00047"></a><span class="lineno">   47</span>&#160;<span class="preprocessor">#define SYSCON_SPINCS_SEL_2      (0x01 &lt;&lt; 2)</span></div><div class="line"><a name="l00048"></a><span class="lineno">   48</span>&#160;<span class="preprocessor">#define SYSCON_SPINCS_SEL_3      (0x01 &lt;&lt; 3)</span></div><div class="line"><a name="l00049"></a><span class="lineno">   49</span>&#160;<span class="preprocessor">#define SYSCON_SPINCS_SEL_4      (0x01 &lt;&lt; 10)</span></div><div class="line"><a name="l00050"></a><span class="lineno">   50</span>&#160;</div><div class="line"><a name="l00051"></a><span class="lineno">   51</span>&#160;<span class="preprocessor">#define SYSCON_TIMETR_SEL_0      (0x01 &lt;&lt; 16)</span></div><div class="line"><a name="l00052"></a><span class="lineno">   52</span>&#160;<span class="preprocessor">#define SYSCON_TIMETR_SEL_1      (0x01 &lt;&lt; 17)</span></div><div class="line"><a name="l00053"></a><span class="lineno">   53</span>&#160;<span class="preprocessor">#define SYSCON_TIMETR_SEL_2      (0x01 &lt;&lt; 18)</span></div><div class="line"><a name="l00054"></a><span class="lineno">   54</span>&#160;<span class="preprocessor">#define SYSCON_TIMETR_SEL_3      (0x01 &lt;&lt; 19)</span></div><div class="line"><a name="l00055"></a><span class="lineno">   55</span>&#160;<span class="preprocessor">#define SYSCON_TIMETR_SEL_4      (0x01 &lt;&lt; 23)</span></div><div class="line"><a name="l00056"></a><span class="lineno">   56</span>&#160;</div><div class="line"><a name="l00057"></a><span class="lineno">   57</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_LOWLEVEL  (0x00000000)</span></div><div class="line"><a name="l00058"></a><span class="lineno">   58</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PA1       (SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00059"></a><span class="lineno">   59</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PA2       (SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00060"></a><span class="lineno">   60</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PA3       (SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00061"></a><span class="lineno">   61</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB4       (SYSCON_TIMETR_SEL_2)</span></div><div class="line"><a name="l00062"></a><span class="lineno">   62</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB5       (SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00063"></a><span class="lineno">   63</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC3       (SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00064"></a><span class="lineno">   64</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC4       (SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00065"></a><span class="lineno">   65</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC5       (SYSCON_TIMETR_SEL_3)</span></div><div class="line"><a name="l00066"></a><span class="lineno">   66</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC6       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00067"></a><span class="lineno">   67</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC7       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00068"></a><span class="lineno">   68</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD1       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00069"></a><span class="lineno">   69</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD2       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_2)</span></div><div class="line"><a name="l00070"></a><span class="lineno">   70</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD3       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00071"></a><span class="lineno">   71</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD4       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00072"></a><span class="lineno">   72</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD6       (SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00073"></a><span class="lineno">   73</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PA4       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00074"></a><span class="lineno">   74</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB0       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00075"></a><span class="lineno">   75</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB1       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00076"></a><span class="lineno">   76</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB2       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_2)</span></div><div class="line"><a name="l00077"></a><span class="lineno">   77</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB3       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00078"></a><span class="lineno">   78</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB6       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00079"></a><span class="lineno">   79</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PB7       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_2 | SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00080"></a><span class="lineno">   80</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC0       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_3)</span></div><div class="line"><a name="l00081"></a><span class="lineno">   81</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC1       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00082"></a><span class="lineno">   82</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PC2       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_1)</span></div><div class="line"><a name="l00083"></a><span class="lineno">   83</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD0       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_1 | SYSCON_TIMETR_SEL_0)</span></div><div class="line"><a name="l00084"></a><span class="lineno">   84</span>&#160;<span class="preprocessor">#define SYSCON_TIM_ETR_PD7       (SYSCON_TIMETR_SEL_4 | SYSCON_TIMETR_SEL_3 | SYSCON_TIMETR_SEL_2)</span></div><div class="line"><a name="l00085"></a><span class="lineno">   85</span>&#160;</div><div class="line"><a name="l00086"></a><span class="lineno">   86</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_HIGHLEVEL (0x00000000)</span></div><div class="line"><a name="l00087"></a><span class="lineno">   87</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PA1       (SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00088"></a><span class="lineno">   88</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PA2       (SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00089"></a><span class="lineno">   89</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PA3       (SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00090"></a><span class="lineno">   90</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB4       (SYSCON_SPINCS_SEL_2)</span></div><div class="line"><a name="l00091"></a><span class="lineno">   91</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB5       (SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00092"></a><span class="lineno">   92</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC3       (SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00093"></a><span class="lineno">   93</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC4       (SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00094"></a><span class="lineno">   94</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC5       (SYSCON_SPINCS_SEL_3)</span></div><div class="line"><a name="l00095"></a><span class="lineno">   95</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC6       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00096"></a><span class="lineno">   96</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC7       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00097"></a><span class="lineno">   97</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD1       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00098"></a><span class="lineno">   98</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD2       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_2)</span></div><div class="line"><a name="l00099"></a><span class="lineno">   99</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD3       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00100"></a><span class="lineno">  100</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD4       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00101"></a><span class="lineno">  101</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD6       (SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00102"></a><span class="lineno">  102</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PA4       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00103"></a><span class="lineno">  103</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB0       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00104"></a><span class="lineno">  104</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB1       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00105"></a><span class="lineno">  105</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB2       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_2)</span></div><div class="line"><a name="l00106"></a><span class="lineno">  106</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB3       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00107"></a><span class="lineno">  107</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB6       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00108"></a><span class="lineno">  108</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PB7       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_2 | SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00109"></a><span class="lineno">  109</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC0       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_3)</span></div><div class="line"><a name="l00110"></a><span class="lineno">  110</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC1       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00111"></a><span class="lineno">  111</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PC2       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_1)</span></div><div class="line"><a name="l00112"></a><span class="lineno">  112</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD0       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_1 | SYSCON_SPINCS_SEL_0)</span></div><div class="line"><a name="l00113"></a><span class="lineno">  113</span>&#160;<span class="preprocessor">#define SYSCON_SPI_NCS_PD7       (SYSCON_SPINCS_SEL_4 | SYSCON_SPINCS_SEL_3 | SYSCON_SPINCS_SEL_2)</span></div><div class="line"><a name="l00114"></a><span class="lineno">  114</span>&#160;</div><div class="line"><a name="l00115"></a><span class="lineno">  115</span>&#160;<span class="preprocessor">#define SYSCON_CLKFAILBRKEN      SYSCON_TIM1CR_CLKFAILBRKEN</span></div><div class="line"><a name="l00116"></a><span class="lineno">  116</span>&#160;<span class="preprocessor">#define SYSCON_DSLPBRKEN         SYSCON_TIM1CR_DSLPBRKEN</span></div><div class="line"><a name="l00117"></a><span class="lineno">  117</span>&#160;</div><div class="line"><a name="l00118"></a><span class="lineno">  118</span>&#160;<span class="preprocessor">#define SYSCON_OCOUT_LOWLEVEL    SYSCON_TIM1CR_TIM1BRKOUTCFG</span></div><div class="line"><a name="l00119"></a><span class="lineno">  119</span>&#160;<span class="preprocessor">#define SYSCON_OCOUT_BYTIM1      (0x00U)</span></div><div class="line"><a name="l00120"></a><span class="lineno">  120</span>&#160;</div><div class="line"><a name="l00125"></a><span class="lineno">  125</span>&#160;<span class="comment">/* Exported macro ------------------------------------------------------------*/</span></div><div class="line"><a name="l00126"></a><span class="lineno">  126</span>&#160;</div><div class="line"><a name="l00127"></a><span class="lineno">  127</span>&#160;<span class="preprocessor">#define SYSCON_REGWR_LOCK()   (SYSCON-&gt;UNLOCK = (0x2AD5334C &lt;&lt; SYSCON_UNLOCK_KEY_Pos) &amp; SYSCON_UNLOCK_KEY)</span></div><div class="line"><a name="l00128"></a><span class="lineno">  128</span>&#160;<span class="preprocessor">#define SYSCON_REGWR_UNLOCK() (SYSCON-&gt;UNLOCK = SYSCON_UNLOCK_UNLOCK | (0x2AD5334C &lt;&lt; SYSCON_UNLOCK_KEY_Pos))</span></div><div class="line"><a name="l00129"></a><span class="lineno">  129</span>&#160;</div><div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga4ffa24104f47f6a98022da546aaee7b2">  133</a></span>&#160;<span class="preprocessor">#define SYSCON_DBGDEEPSLEEP_ENABLE()                                                                \</span></div><div class="line"><a name="l00134"></a><span class="lineno">  134</span>&#160;<span class="preprocessor">  do {                                                                                              \</span></div><div class="line"><a name="l00135"></a><span class="lineno">  135</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                          \</span></div><div class="line"><a name="l00136"></a><span class="lineno">  136</span>&#160;<span class="preprocessor">    SET_BIT(SYSCON-&gt;CFGR0, SYSCON_CFGR0_DBGDLSP_DIS | (SYSCON_CFGR0_KEY &lt;&lt; SYSCON_CFGR0_KEY_Pos));  \</span></div><div class="line"><a name="l00137"></a><span class="lineno">  137</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                            \</span></div><div class="line"><a name="l00138"></a><span class="lineno">  138</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00139"></a><span class="lineno">  139</span>&#160;</div><div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gab5d18317abfb34aa50a6d897208a5bb6">  143</a></span>&#160;<span class="preprocessor">#define SYSCON_DBGDEEPSLEEP_DISABLE()                                                                  \</span></div><div class="line"><a name="l00144"></a><span class="lineno">  144</span>&#160;<span class="preprocessor">  do {                                                                                                 \</span></div><div class="line"><a name="l00145"></a><span class="lineno">  145</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                             \</span></div><div class="line"><a name="l00146"></a><span class="lineno">  146</span>&#160;<span class="preprocessor">    CLEAR_WPBIT(SYSCON-&gt;CFGR0, SYSCON_CFGR0_DBGDLSP_DIS, (SYSCON_CFGR0_KEY &lt;&lt; SYSCON_CFGR0_KEY_Pos));  \</span></div><div class="line"><a name="l00147"></a><span class="lineno">  147</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                               \</span></div><div class="line"><a name="l00148"></a><span class="lineno">  148</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00149"></a><span class="lineno">  149</span>&#160;</div><div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga29c552fad69d621adf99f30c2c91bec5">  152</a></span>&#160;<span class="preprocessor">#define SYSCON_LOCKUP_ENABLE()                                                                   \</span></div><div class="line"><a name="l00153"></a><span class="lineno">  153</span>&#160;<span class="preprocessor">  do {                                                                                           \</span></div><div class="line"><a name="l00154"></a><span class="lineno">  154</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                       \</span></div><div class="line"><a name="l00155"></a><span class="lineno">  155</span>&#160;<span class="preprocessor">    SET_BIT(SYSCON-&gt;CFGR0, SYSCON_CFGR0_LOCKUPEN | (SYSCON_CFGR0_KEY &lt;&lt; SYSCON_CFGR0_KEY_Pos));  \</span></div><div class="line"><a name="l00156"></a><span class="lineno">  156</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                         \</span></div><div class="line"><a name="l00157"></a><span class="lineno">  157</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00158"></a><span class="lineno">  158</span>&#160;</div><div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga665531de1641bb42d08479bf0380e211">  161</a></span>&#160;<span class="preprocessor">#define SYSCON_LOCKUP_DISABLE()                                                                     \</span></div><div class="line"><a name="l00162"></a><span class="lineno">  162</span>&#160;<span class="preprocessor">  do {                                                                                              \</span></div><div class="line"><a name="l00163"></a><span class="lineno">  163</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                          \</span></div><div class="line"><a name="l00164"></a><span class="lineno">  164</span>&#160;<span class="preprocessor">    CLEAR_WPBIT(SYSCON-&gt;CFGR0, SYSCON_CFGR0_LOCKUPEN, (SYSCON_CFGR0_KEY &lt;&lt; SYSCON_CFGR0_KEY_Pos));  \</span></div><div class="line"><a name="l00165"></a><span class="lineno">  165</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                            \</span></div><div class="line"><a name="l00166"></a><span class="lineno">  166</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00167"></a><span class="lineno">  167</span>&#160;</div><div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga464861e90fda6b717fc8d6dc8cd86a14">  170</a></span>&#160;<span class="preprocessor">#define SYSCON_DEEPSLEEP_PADINT_AUTO()                                                                            \</span></div><div class="line"><a name="l00171"></a><span class="lineno">  171</span>&#160;<span class="preprocessor">  do {                                                                                                            \</span></div><div class="line"><a name="l00172"></a><span class="lineno">  172</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                        \</span></div><div class="line"><a name="l00173"></a><span class="lineno">  173</span>&#160;<span class="preprocessor">    CLEAR_WPBIT(SYSCON-&gt;PORTINTCR, SYSCON_PORTINTCR_PADDLSPCON, (SYSCON_UNLOCK_KEY &lt;&lt; SYSCON_PORTINTCR_KEY_Pos)); \</span></div><div class="line"><a name="l00174"></a><span class="lineno">  174</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                          \</span></div><div class="line"><a name="l00175"></a><span class="lineno">  175</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00176"></a><span class="lineno">  176</span>&#160;</div><div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gaf5c94b71a77f4babe8af06b810c3f94c">  179</a></span>&#160;<span class="preprocessor">#define SYSCON_DEEPSLEEP_PADINT_ACTIVE()                                                                         \</span></div><div class="line"><a name="l00180"></a><span class="lineno">  180</span>&#160;<span class="preprocessor">  do {                                                                                                           \</span></div><div class="line"><a name="l00181"></a><span class="lineno">  181</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                       \</span></div><div class="line"><a name="l00182"></a><span class="lineno">  182</span>&#160;<span class="preprocessor">    SET_BIT(SYSCON-&gt;PORTINTCR, SYSCON_PORTINTCR_PADDLSPCON | (SYSCON_UNLOCK_KEY &lt;&lt; SYSCON_PORTINTCR_KEY_Pos));   \</span></div><div class="line"><a name="l00183"></a><span class="lineno">  183</span>&#160;<span class="preprocessor">    CLEAR_WPBIT(SYSCON-&gt;PORTINTCR, SYSCON_PORTINTCR_PADINTSEL, (SYSCON_UNLOCK_KEY &lt;&lt; SYSCON_PORTINTCR_KEY_Pos)); \</span></div><div class="line"><a name="l00184"></a><span class="lineno">  184</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                         \</span></div><div class="line"><a name="l00185"></a><span class="lineno">  185</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00186"></a><span class="lineno">  186</span>&#160;</div><div class="line"><a name="l00195"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gae403042afdbacde8f8149586b3b32130">  195</a></span>&#160;<span class="preprocessor">#define SYSCON_LPTIM_GATE(SOURCE)                                                                             \</span></div><div class="line"><a name="l00196"></a><span class="lineno">  196</span>&#160;<span class="preprocessor">  do {                                                                                                        \</span></div><div class="line"><a name="l00197"></a><span class="lineno">  197</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                    \</span></div><div class="line"><a name="l00198"></a><span class="lineno">  198</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PORTCR, SYSCON_PORTCR_LPTIM_GATE_SEL, ((SOURCE) &lt;&lt; SYSCON_PORTCR_LPTIM_GATE_SEL_Pos)); \</span></div><div class="line"><a name="l00199"></a><span class="lineno">  199</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                    \</span></div><div class="line"><a name="l00200"></a><span class="lineno">  200</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00201"></a><span class="lineno">  201</span>&#160;</div><div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga6679b5a72e1ceafa2148d4068cb79189">  210</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM11_GATE(SOURCE)                                                                             \</span></div><div class="line"><a name="l00211"></a><span class="lineno">  211</span>&#160;<span class="preprocessor">  do {                                                                                                        \</span></div><div class="line"><a name="l00212"></a><span class="lineno">  212</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                    \</span></div><div class="line"><a name="l00213"></a><span class="lineno">  213</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PORTCR, SYSCON_PORTCR_TIM11_GATE_SEL, ((SOURCE) &lt;&lt; SYSCON_PORTCR_TIM11_GATE_SEL_Pos)); \</span></div><div class="line"><a name="l00214"></a><span class="lineno">  214</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                      \</span></div><div class="line"><a name="l00215"></a><span class="lineno">  215</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00216"></a><span class="lineno">  216</span>&#160;</div><div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga8834beb2c3ad2292f919ee5141e79045">  225</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM10_GATE(SOURCE)                                                                             \</span></div><div class="line"><a name="l00226"></a><span class="lineno">  226</span>&#160;<span class="preprocessor">  do {                                                                                                        \</span></div><div class="line"><a name="l00227"></a><span class="lineno">  227</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                    \</span></div><div class="line"><a name="l00228"></a><span class="lineno">  228</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PORTCR, SYSCON_PORTCR_TIM10_GATE_SEL, ((SOURCE) &lt;&lt; SYSCON_PORTCR_TIM10_GATE_SEL_Pos)); \</span></div><div class="line"><a name="l00229"></a><span class="lineno">  229</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                      \</span></div><div class="line"><a name="l00230"></a><span class="lineno">  230</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00231"></a><span class="lineno">  231</span>&#160;</div><div class="line"><a name="l00264"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gaaeead8cc77f6be13fcb28771ec545a3a">  264</a></span>&#160;<span class="preprocessor">#define SYSCON_SPINCS(SOURCE)                                       \</span></div><div class="line"><a name="l00265"></a><span class="lineno">  265</span>&#160;<span class="preprocessor">  do {                                                              \</span></div><div class="line"><a name="l00266"></a><span class="lineno">  266</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                          \</span></div><div class="line"><a name="l00267"></a><span class="lineno">  267</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PORTCR, SYSCON_PORTCR_SPINCS_SEL, (SOURCE)); \</span></div><div class="line"><a name="l00268"></a><span class="lineno">  268</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                            \</span></div><div class="line"><a name="l00269"></a><span class="lineno">  269</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00270"></a><span class="lineno">  270</span>&#160;</div><div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga596a028478a054d23f31378337ca814a">  279</a></span>&#160;<span class="preprocessor">#define SYSCON_PCA_CAP4(SOURCE)                                                                        \</span></div><div class="line"><a name="l00280"></a><span class="lineno">  280</span>&#160;<span class="preprocessor">  do {                                                                                                 \</span></div><div class="line"><a name="l00281"></a><span class="lineno">  281</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                             \</span></div><div class="line"><a name="l00282"></a><span class="lineno">  282</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PCACR, SYSCON_PCACR_PCA_CAP4_SEL, ((SOURCE) &lt;&lt; SYSCON_PCACR_PCA_CAP4_SEL_Pos)); \</span></div><div class="line"><a name="l00283"></a><span class="lineno">  283</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                               \</span></div><div class="line"><a name="l00284"></a><span class="lineno">  284</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00285"></a><span class="lineno">  285</span>&#160;</div><div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga4cc4b6f614b77c81508181bdc3ab0b01">  294</a></span>&#160;<span class="preprocessor">#define SYSCON_PCA_CAP3(SOURCE)                                                                        \</span></div><div class="line"><a name="l00295"></a><span class="lineno">  295</span>&#160;<span class="preprocessor">  do {                                                                                                 \</span></div><div class="line"><a name="l00296"></a><span class="lineno">  296</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                             \</span></div><div class="line"><a name="l00297"></a><span class="lineno">  297</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PCACR, SYSCON_PCACR_PCA_CAP3_SEL, ((SOURCE) &lt;&lt; SYSCON_PCACR_PCA_CAP3_SEL_Pos)); \</span></div><div class="line"><a name="l00298"></a><span class="lineno">  298</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                               \</span></div><div class="line"><a name="l00299"></a><span class="lineno">  299</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00300"></a><span class="lineno">  300</span>&#160;</div><div class="line"><a name="l00309"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gaa94046b4cb923c3205fd20e8ee0e69c3">  309</a></span>&#160;<span class="preprocessor">#define SYSCON_PCA_CAP2(SOURCE)                                                                        \</span></div><div class="line"><a name="l00310"></a><span class="lineno">  310</span>&#160;<span class="preprocessor">  do {                                                                                                 \</span></div><div class="line"><a name="l00311"></a><span class="lineno">  311</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                             \</span></div><div class="line"><a name="l00312"></a><span class="lineno">  312</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PCACR, SYSCON_PCACR_PCA_CAP2_SEL, ((SOURCE) &lt;&lt; SYSCON_PCACR_PCA_CAP2_SEL_Pos)); \</span></div><div class="line"><a name="l00313"></a><span class="lineno">  313</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                               \</span></div><div class="line"><a name="l00314"></a><span class="lineno">  314</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00315"></a><span class="lineno">  315</span>&#160;</div><div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gaae76153b73263c182bd8537399c42023">  324</a></span>&#160;<span class="preprocessor">#define SYSCON_PCA_CAP1(SOURCE)                                                                        \</span></div><div class="line"><a name="l00325"></a><span class="lineno">  325</span>&#160;<span class="preprocessor">  do {                                                                                                 \</span></div><div class="line"><a name="l00326"></a><span class="lineno">  326</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                             \</span></div><div class="line"><a name="l00327"></a><span class="lineno">  327</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PCACR, SYSCON_PCACR_PCA_CAP1_SEL, ((SOURCE) &lt;&lt; SYSCON_PCACR_PCA_CAP1_SEL_Pos)); \</span></div><div class="line"><a name="l00328"></a><span class="lineno">  328</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                               \</span></div><div class="line"><a name="l00329"></a><span class="lineno">  329</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00330"></a><span class="lineno">  330</span>&#160;</div><div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gaa36adaef26ba7e14bbaa2f1e0236c7cc">  339</a></span>&#160;<span class="preprocessor">#define SYSCON_PCA_CAP0(SOURCE)                                                                        \</span></div><div class="line"><a name="l00340"></a><span class="lineno">  340</span>&#160;<span class="preprocessor">  do {                                                                                                 \</span></div><div class="line"><a name="l00341"></a><span class="lineno">  341</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                             \</span></div><div class="line"><a name="l00342"></a><span class="lineno">  342</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;PCACR, SYSCON_PCACR_PCA_CAP0_SEL, ((SOURCE) &lt;&lt; SYSCON_PCACR_PCA_CAP0_SEL_Pos)); \</span></div><div class="line"><a name="l00343"></a><span class="lineno">  343</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                               \</span></div><div class="line"><a name="l00344"></a><span class="lineno">  344</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00345"></a><span class="lineno">  345</span>&#160;</div><div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga8d3be636359cc397303f3b35479af536">  352</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1_BREAKIN_SEL(SOURCE)                                                         \</span></div><div class="line"><a name="l00353"></a><span class="lineno">  353</span>&#160;<span class="preprocessor">  do {                                                                                          \</span></div><div class="line"><a name="l00354"></a><span class="lineno">  354</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                      \</span></div><div class="line"><a name="l00355"></a><span class="lineno">  355</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_CLKFAILBRKEN | SYSCON_TIM1CR_DSLPBRKEN, (SOURCE)); \</span></div><div class="line"><a name="l00356"></a><span class="lineno">  356</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                        \</span></div><div class="line"><a name="l00357"></a><span class="lineno">  357</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00358"></a><span class="lineno">  358</span>&#160;</div><div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga5e5eb2b7b5d980242924bd42ceb6d7f1">  365</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1_BREAKOUT_CFG(CONFIG)                               \</span></div><div class="line"><a name="l00366"></a><span class="lineno">  366</span>&#160;<span class="preprocessor">  do {                                                                 \</span></div><div class="line"><a name="l00367"></a><span class="lineno">  367</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                             \</span></div><div class="line"><a name="l00368"></a><span class="lineno">  368</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_TIM1BRKOUTCFG, (CONFIG)); \</span></div><div class="line"><a name="l00369"></a><span class="lineno">  369</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                               \</span></div><div class="line"><a name="l00370"></a><span class="lineno">  370</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00371"></a><span class="lineno">  371</span>&#160;</div><div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga3fd63e3aa10cbb17028314e62d05ddd7">  404</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1ETR_SEL(SOURCE)                                   \</span></div><div class="line"><a name="l00405"></a><span class="lineno">  405</span>&#160;<span class="preprocessor">  do {                                                               \</span></div><div class="line"><a name="l00406"></a><span class="lineno">  406</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                           \</span></div><div class="line"><a name="l00407"></a><span class="lineno">  407</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_TIM1ETR_SEL, (SOURCE)); \</span></div><div class="line"><a name="l00408"></a><span class="lineno">  408</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                             \</span></div><div class="line"><a name="l00409"></a><span class="lineno">  409</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00410"></a><span class="lineno">  410</span>&#160;</div><div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gae8074c23028b64452766ab4f1f1a9f35">  420</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1CH4IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00421"></a><span class="lineno">  421</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00422"></a><span class="lineno">  422</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00423"></a><span class="lineno">  423</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_TIM1CH4IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM1CR_TIM1CH4IN_SEL_Pos)); \</span></div><div class="line"><a name="l00424"></a><span class="lineno">  424</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00425"></a><span class="lineno">  425</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00426"></a><span class="lineno">  426</span>&#160;</div><div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga1cd1227ea05d61fc3e43a8438ce9bc13">  436</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1CH3IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00437"></a><span class="lineno">  437</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00438"></a><span class="lineno">  438</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00439"></a><span class="lineno">  439</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_TIM1CH3IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM1CR_TIM1CH3IN_SEL_Pos)); \</span></div><div class="line"><a name="l00440"></a><span class="lineno">  440</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00441"></a><span class="lineno">  441</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00442"></a><span class="lineno">  442</span>&#160;</div><div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gae6638a5374dd07f0c0accf4e14856e42">  452</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1CH2IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00453"></a><span class="lineno">  453</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00454"></a><span class="lineno">  454</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00455"></a><span class="lineno">  455</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_TIM1CH2IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM1CR_TIM1CH2IN_SEL_Pos)); \</span></div><div class="line"><a name="l00456"></a><span class="lineno">  456</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00457"></a><span class="lineno">  457</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00458"></a><span class="lineno">  458</span>&#160;</div><div class="line"><a name="l00468"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga09670fc94794ec4cf2956d8bc02cccbe">  468</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM1CH1IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00469"></a><span class="lineno">  469</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00470"></a><span class="lineno">  470</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00471"></a><span class="lineno">  471</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM1CR, SYSCON_TIM1CR_TIM1CH1IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM1CR_TIM1CH1IN_SEL_Pos)); \</span></div><div class="line"><a name="l00472"></a><span class="lineno">  472</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00473"></a><span class="lineno">  473</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00474"></a><span class="lineno">  474</span>&#160;</div><div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gafef507cba72663722b662288320d4590">  507</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM2ETR_SEL(SOURCE)                                   \</span></div><div class="line"><a name="l00508"></a><span class="lineno">  508</span>&#160;<span class="preprocessor">  do {                                                               \</span></div><div class="line"><a name="l00509"></a><span class="lineno">  509</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                           \</span></div><div class="line"><a name="l00510"></a><span class="lineno">  510</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM2CR, SYSCON_TIM2CR_TIM2ETR_SEL, (SOURCE)); \</span></div><div class="line"><a name="l00511"></a><span class="lineno">  511</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                             \</span></div><div class="line"><a name="l00512"></a><span class="lineno">  512</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00513"></a><span class="lineno">  513</span>&#160;</div><div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#gacc2c4ffef0ae93c3b767540a00086008">  523</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM2CH4IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00524"></a><span class="lineno">  524</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00525"></a><span class="lineno">  525</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00526"></a><span class="lineno">  526</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM2CR, SYSCON_TIM2CR_TIM2CH4IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM2CR_TIM2CH4IN_SEL_Pos)); \</span></div><div class="line"><a name="l00527"></a><span class="lineno">  527</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00528"></a><span class="lineno">  528</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00529"></a><span class="lineno">  529</span>&#160;</div><div class="line"><a name="l00539"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga09e6e9ce9190dd6f36f2725c2e4e80ae">  539</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM2CH3IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00540"></a><span class="lineno">  540</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00541"></a><span class="lineno">  541</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00542"></a><span class="lineno">  542</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM2CR, SYSCON_TIM2CR_TIM2CH3IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM2CR_TIM2CH3IN_SEL_Pos)); \</span></div><div class="line"><a name="l00543"></a><span class="lineno">  543</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00544"></a><span class="lineno">  544</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00545"></a><span class="lineno">  545</span>&#160;</div><div class="line"><a name="l00555"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga43ed7dbc3cdf78742b00e28102436932">  555</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM2CH2IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00556"></a><span class="lineno">  556</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00557"></a><span class="lineno">  557</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00558"></a><span class="lineno">  558</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM2CR, SYSCON_TIM2CR_TIM2CH2IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM2CR_TIM2CH2IN_SEL_Pos)); \</span></div><div class="line"><a name="l00559"></a><span class="lineno">  559</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00560"></a><span class="lineno">  560</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00561"></a><span class="lineno">  561</span>&#160;</div><div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="group___s_y_s_c_o_n.html#ga49abe5b7d9363341af60563741c735fe">  571</a></span>&#160;<span class="preprocessor">#define SYSCON_TIM2CH1IN_SEL(SOURCE)                                                                        \</span></div><div class="line"><a name="l00572"></a><span class="lineno">  572</span>&#160;<span class="preprocessor">  do {                                                                                                      \</span></div><div class="line"><a name="l00573"></a><span class="lineno">  573</span>&#160;<span class="preprocessor">    SYSCON_REGWR_UNLOCK();                                                                                  \</span></div><div class="line"><a name="l00574"></a><span class="lineno">  574</span>&#160;<span class="preprocessor">    MODIFY_REG(SYSCON-&gt;TIM2CR, SYSCON_TIM2CR_TIM2CH1IN_SEL, ((SOURCE) &lt;&lt; SYSCON_TIM2CR_TIM2CH1IN_SEL_Pos)); \</span></div><div class="line"><a name="l00575"></a><span class="lineno">  575</span>&#160;<span class="preprocessor">    SYSCON_REGWR_LOCK();                                                                                    \</span></div><div class="line"><a name="l00576"></a><span class="lineno">  576</span>&#160;<span class="preprocessor">  } while (0)</span></div><div class="line"><a name="l00577"></a><span class="lineno">  577</span>&#160;</div><div class="line"><a name="l00578"></a><span class="lineno">  578</span>&#160;<span class="comment">/* Exported functions --------------------------------------------------------*/</span></div><div class="line"><a name="l00579"></a><span class="lineno">  579</span>&#160;</div><div class="line"><a name="l00588"></a><span class="lineno">  588</span>&#160;<span class="preprocessor">#ifdef __cplusplus</span></div><div class="line"><a name="l00589"></a><span class="lineno">  589</span>&#160;}</div><div class="line"><a name="l00590"></a><span class="lineno">  590</span>&#160;<span class="preprocessor">#endif</span></div><div class="line"><a name="l00591"></a><span class="lineno">  591</span>&#160;</div><div class="line"><a name="l00592"></a><span class="lineno">  592</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/*__WB32L003_SYSCON_H */</span><span class="preprocessor"></span></div></div><!-- fragment --></div><!-- contents -->
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